3 ms·

That's all very analogous to software compilers, but doesn't really answer the question I had. Specifically for Tiny Tapeout, how much is there to be gained by

by Lerc 2y ago

That's all very analogous to software compilers, but doesn't really answer the question I had. Specifically for Tiny Tapeout, how much is there to be gained by going low level? I feel like using a subset of verilog features might get you most of the way there. Consider that there is a 512 byte BASIC interpreter in asm, that's well beyond what a compiler could manage. I would expect logic expressions in verilog to get closer to a hand crafted approach than that, but I might be wrong.

Taniwha 2y ago
(I've written Verilog compilers, normal compilers, designed gates and chips, can read polygons, written assembler, etc etc) I think it is all very analogous to software compilers, but IMHO writing in assembler is an order of magnitude easier than manually laying gates, and maybe 2-3 orders more than manually laying polygons. Yes you can get better performance and density by laying polygons, especially stuff like ROMs and RAMs and regular ALU structures, but it's a lot of work and not a rathole you want to go down as a beginner
- Lerc 2y ago
  How about if I'm a masochist :) I do have form when it comes to the needlessly complicatedly making things small like impenetrable programs that fit in a url https://c50.fingswotidun.com/show/?code=z1s-xy*dee%2B%2B2*z!%23d%3B*%3A!uva~z4t4%25-%2B4w2**%2B https://c50.fingswotidun.com/show/?code=z1s-xy*dee%2B%2B2*z!... Polygon level seems more akin to machine code than asm. That is (usually) a step too far for me. Very tempted to do something for tiny_tapeout, it does seem the kind of nerd sniping aimed at me. I'm going to take a stab and say judging from your username, you are vaguely near me (Chch).
  - femto 2y ago
    If we're talking nerd sniping: A polygon layout for an analog computer that directly generates the RGB analog VGA signals. :-) (Must resist...)
  - Taniwha 2y ago
    Mostly I'm just trying to explain just how (relatively) hard things are, so people wont get too far out of their depth. I'd really recommend doing the usual HLL/assembler approach - start with a verilog only implementation, build a test bench (tiny tapeout has infrastructure for this), look at the bits you want to be faster/denser, try a hand compiled gates implementation (you can do this within verilog for a start), then maybe even hand lay it out Yes, I live south of you in Dunedin, though I worked in the SF Bay Area for a couple of decades doing all sorts of stuff including chips, OS's, embedded crypto stuff etc
  - therealcamino 2y ago
    If you want to do low level design, you can look at the Micro Magic public domain tool set. As someone said above, Verilog only describes the logical function (ranging from the RTL level to the gate level.) You'd need other tools to work on everything physical, like placement and routing. https://github.com/yarpose/YARPOSE.Micromagic_PD https://github.com/yarpose/YARPOSE.Micromagic_PD
rasz 2y ago
Can be huge depending how low level you are allowed to go. For example from recent 38C3 - The Design Decisions behind the first Open-Everything FABulous FPGA https://www.youtube.com/watch?v=3Lll9_-gYGg https://www.youtube.com/watch?v=3Lll9_-gYGg there was a mention of using open source SRAM library versus Siemens one. Open source macros build 1KB 12MHz ram while siemens is 3x capacity 100MHz https://youtu.be/3Lll9_-gYGg?feature=shared&t=1740 https://youtu.be/3Lll9_-gYGg?feature=shared&t=1740 Siemens delivers this by breaking foundry design rules :) https://youtu.be/3Lll9_-gYGg?feature=shared&t=1878 https://youtu.be/3Lll9_-gYGg?feature=shared&t=1878

by Lerc 2y ago

Taniwha 2y ago

(I've written Verilog compilers, normal compilers, designed gates and chips, can read polygons, written assembler, etc etc) I think it is all very analogous to software compilers, but IMHO writing in assembler is an order of magnitude easier than manually laying gates, and maybe 2-3 orders more than manually laying polygons. Yes you can get better performance and density by laying polygons, especially stuff like ROMs and RAMs and regular ALU structures, but it's a lot of work and not a rathole you want to go down as a beginner

Lerc 2y ago
How about if I'm a masochist :) I do have form when it comes to the needlessly complicatedly making things small like impenetrable programs that fit in a url https://c50.fingswotidun.com/show/?code=z1s-xy*dee%2B%2B2*z!%23d%3B*%3A!uva~z4t4%25-%2B4w2**%2B https://c50.fingswotidun.com/show/?code=z1s-xy*dee%2B%2B2*z!... Polygon level seems more akin to machine code than asm. That is (usually) a step too far for me. Very tempted to do something for tiny_tapeout, it does seem the kind of nerd sniping aimed at me. I'm going to take a stab and say judging from your username, you are vaguely near me (Chch).
- femto 2y ago
  If we're talking nerd sniping: A polygon layout for an analog computer that directly generates the RGB analog VGA signals. :-) (Must resist...)
- Taniwha 2y ago
  Mostly I'm just trying to explain just how (relatively) hard things are, so people wont get too far out of their depth. I'd really recommend doing the usual HLL/assembler approach - start with a verilog only implementation, build a test bench (tiny tapeout has infrastructure for this), look at the bits you want to be faster/denser, try a hand compiled gates implementation (you can do this within verilog for a start), then maybe even hand lay it out Yes, I live south of you in Dunedin, though I worked in the SF Bay Area for a couple of decades doing all sorts of stuff including chips, OS's, embedded crypto stuff etc
- therealcamino 2y ago
  If you want to do low level design, you can look at the Micro Magic public domain tool set. As someone said above, Verilog only describes the logical function (ranging from the RTL level to the gate level.) You'd need other tools to work on everything physical, like placement and routing. https://github.com/yarpose/YARPOSE.Micromagic_PD https://github.com/yarpose/YARPOSE.Micromagic_PD

rasz 2y ago

Can be huge depending how low level you are allowed to go. For example from recent 38C3 - The Design Decisions behind the first Open-Everything FABulous FPGA https://www.youtube.com/watch?v=3Lll9_-gYGg https://www.youtube.com/watch?v=3Lll9_-gYGg there was a mention of using open source SRAM library versus Siemens one. Open source macros build 1KB 12MHz ram while siemens is 3x capacity 100MHz https://youtu.be/3Lll9_-gYGg?feature=shared&t=1740 https://youtu.be/3Lll9_-gYGg?feature=shared&t=1740 Siemens delivers this by breaking foundry design rules :) https://youtu.be/3Lll9_-gYGg?feature=shared&t=1878 https://youtu.be/3Lll9_-gYGg?feature=shared&t=1878