GPU cores: + Efficient decoding of one instruction stream for many parallel cores. + Efficient parallel access to lots of data in regular layout with address

GPU cores: + Efficient decoding of one instruction stream for many parallel cores. + Efficient parallel access to lots of data in regular layout with address offsets relative to core index. - Lots of instruction streams quickly require serialization, given only one instruction stream can be handled per block of co-working cores. - Only 1 or a few parallel calculations per stream, leaves rest of co-workers unused. - Irregular data layouts, force parallel memory hardware to act sequentially, with each core getting access while the others wait their turn, until all cores access is complete. - Lots of branching stalls cores, as cores that take one branch execute, while the other cores stall, and then vice versa. CPU cores: + Efficient decoding of different instruction streams per core. + Efficient with different memory layouts, due to per core caching. + Highly optimized for branching. - Parallel calculations across cores suffer from redundant instruction decoding overhead for every core. - Highly parallel calculations suffer, from the relatively low number of cores. GPU and CPU: + Both optimized for sequential data access across sequentially offset addresses. CPU Bonuses: + They handle overall system initialization, power & device management, and other system tasks. + SIMD instructions let each CPU core perform a bit like a little GPU core group.