4 ms·

This is one of the best treatises on debounce, I've read it a number of times and probably will again. One of the best things I've done to help with really bad

This is one of the best treatises on debounce, I've read it a number of times and probably will again. One of the best things I've done to help with really bad debounce is spend time testing a number of buttons to find the designs that have, at the hardware/contact level, much less bounce. Some buttons wind up with tens of ms of bounce, and it's hard to correct for it and meet expectations all in software.

StayTrue 2y ago
Agree. Helped me (a software guy) when I needed it. Automatic upvote.
theamk 2y ago
Just don't implement SR debouncer, OK? And don't use MC140* series chips, those don't work with 3.3V used by modern micros. And when he says: > Never run the cap directly to the input on a microprocessor, or to pretty much any I/O device. Few of these have any input hysteresis. that's not true today, most small MCU made in 2005 or later (such as AVR and STM8 series) have input hysteresis, so feel free to connect cap directly to it. And when he says: > don't tie undebounced switches, even if Schmitt Triggered, to interrupt inputs on the CPU that's also not correct for most modern CPUs, they no longer have a dedicated interrupt line, and interrupts share hardware (including synchronizer) with GPIO. So feel free to tie undebounced switch to interrupt lines.
- AdamH12113 2y ago
  What's wrong with the SR latch debouncer?
  - theamk 2y ago
    It needs SPDT switch, and that rules out most of buttons. And if you do end up choosing SPDT switch, then there are much simpler designs which have switch toggle between Vcc and GND, like Don Lancaster's debouncer [0]. That design is especially useful if you have many switches, as you can wire all VCCs and GNDs in parallel, and use 8-channel buffers to debounce multiple ones. The SR latch schematics only makes sense if you are working with TTL logic (popular in 1970/1980) which did not nave a symmetric drive output pattern, and there is absolutely no reason to use it in 2000's. [0] https://modwiggler.com/forum/viewtopic.php?p=275228&sid=52c0156aa2e26c18d031c0beca50a53e#p275228 https://modwiggler.com/forum/viewtopic.php?p=275228&sid=52c0...
    - AdamH12113 2y ago
      Ah, that is better. Thanks!

StayTrue 2y ago

Agree. Helped me (a software guy) when I needed it. Automatic upvote.

theamk 2y ago

Just don't implement SR debouncer, OK? And don't use MC140* series chips, those don't work with 3.3V used by modern micros. And when he says: > Never run the cap directly to the input on a microprocessor, or to pretty much any I/O device. Few of these have any input hysteresis. that's not true today, most small MCU made in 2005 or later (such as AVR and STM8 series) have input hysteresis, so feel free to connect cap directly to it. And when he says: > don't tie undebounced switches, even if Schmitt Triggered, to interrupt inputs on the CPU that's also not correct for most modern CPUs, they no longer have a dedicated interrupt line, and interrupts share hardware (including synchronizer) with GPIO. So feel free to tie undebounced switch to interrupt lines.

AdamH12113 2y ago
What's wrong with the SR latch debouncer?
- theamk 2y ago
  It needs SPDT switch, and that rules out most of buttons. And if you do end up choosing SPDT switch, then there are much simpler designs which have switch toggle between Vcc and GND, like Don Lancaster's debouncer [0]. That design is especially useful if you have many switches, as you can wire all VCCs and GNDs in parallel, and use 8-channel buffers to debounce multiple ones. The SR latch schematics only makes sense if you are working with TTL logic (popular in 1970/1980) which did not nave a symmetric drive output pattern, and there is absolutely no reason to use it in 2000's. [0] https://modwiggler.com/forum/viewtopic.php?p=275228&sid=52c0156aa2e26c18d031c0beca50a53e#p275228 https://modwiggler.com/forum/viewtopic.php?p=275228&sid=52c0...
  - AdamH12113 2y ago
    Ah, that is better. Thanks!