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The NVME controller on Apple Silicon is not PCI-based, so there are no pcie lanes going to the storage chips at all.
by philodeon 2y ago
The NVME controller on Apple Silicon is not PCI-based, so there are no pcie lanes going to the storage chips at all.
- adastra22 2y agoDo we know that for sure? There are I/O lanes being allocated whatever the exact technology being used is. I just don’t see why they’d reinvent the wheel here.
- philodeon 2y agoYes, the Asahi Linux reverse engineers said in their commit message for the Linux apple-nvme driver: “Add a driver for the NVMe storage controller integrated on Apple SoCs. This NVMe controller isn't PCI based and deviates from the NVMe standard in its implementation of the command submission queue and the integration of an NVMMU that needs to be managed. This commit tweaks the core NVMe code to support the linear command submission queue implemented by this controller. But setting up the submission queue and managing the NVMMU controller is handled by implementing the driver ops that were added in an earlier commit.“