3 ms·
The very reason for the Loop Buffer was to let decoder power down within tight loops, so I'd assume micro op cache would have similar effect, except with more i
by p_l 2y ago
The very reason for the Loop Buffer was to let decoder power down within tight loops, so I'd assume micro op cache would have similar effect, except with more impact on performance.
- skavi 2y agoVery curious as to the typical strategy for implementing low power modes on things that are highly latency sensitive like a decoder. Like would whatever mechanism they’ve got behave well if fetches were alternating between cache hits and cache misses?