2 ms·
I would assume the inverse relationship. That enabling the op cache would reduce power draw. Though I also wouldn’t be surprised if they’re always running the d
by skavi 2y ago
I would assume the inverse relationship. That enabling the op cache would reduce power draw. Though I also wouldn’t be surprised if they’re always running the decoder.
- p_l 2y agoThe very reason for the Loop Buffer was to let decoder power down within tight loops, so I'd assume micro op cache would have similar effect, except with more impact on performance.
- skavi 2y agoVery curious as to the typical strategy for implementing low power modes on things that are highly latency sensitive like a decoder. Like would whatever mechanism they’ve got behave well if fetches were alternating between cache hits and cache misses?