4 ms·
I believe the opcache is too small to really matter here to disable. Even though it's fast SRAM, it's not too many transistors. Performance loss will of course
by AstralStorm 2y ago
I believe the opcache is too small to really matter here to disable. Even though it's fast SRAM, it's not too many transistors.
Performance loss will of course cause the task to run longer which increases total power usage.
It makes much more sense to disable SMT instead first, with the performance losses being on par most of the time, while this bringing serious powwr savings.
- skavi 2y agoI would assume the inverse relationship. That enabling the op cache would reduce power draw. Though I also wouldn’t be surprised if they’re always running the decoder.
- p_l 2y agoThe very reason for the Loop Buffer was to let decoder power down within tight loops, so I'd assume micro op cache would have similar effect, except with more impact on performance.
- skavi 2y agoVery curious as to the typical strategy for implementing low power modes on things that are highly latency sensitive like a decoder. Like would whatever mechanism they’ve got behave well if fetches were alternating between cache hits and cache misses?