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When I read the Intel QAT / IAA / DSA whitepaper I knew it was the beginning of the end for Intel. Every aspect of that document was just dripping in corporate
by jiggawatts 2y ago
When I read the Intel QAT / IAA / DSA whitepaper I knew it was the beginning of the end for Intel.
Every aspect of that document was just dripping in corporate dinosaur / MBA practices.
For example, they include 4 cores of these accelerators in most of their Xeons, but soft fuse them off unless you buy a license.
Nobody is going to buy that license. Okay, maybe one or two hyperscalers, but nobody else for certain.
It's ultra-important with a feature like this to make it available to everybody, so that software is written to utilise it. This includes the starving university student contributing to Postgres, not just some big-enterprise customer that merely buys their software!
They're doing the same stupid "gating" with AVX-512 as well, where it's physically included in desktop chips, but it is fused off so that server parts can be "differentiated".
Meanwhile AMD just makes one compute tile that has a uniform programming API across both desktop and server chips. This means that geeks tuning their software to run on their own PCs are inadvertently optimising them for AMD's server chips as well!
PS: Microsoft figured this out a while ago and they fixed some of their products like SQL Server. It now enables practically all features in all SKUs. Previously when only Enterprise Edition has certain programmability features nobody would use them because software vendors couldn't write software that customers couldn't install because they only had Standard Edition!
- alecco 2y agoPreach. I gave up hoping on Intel after getting burned. I feel sorry for the good talent there and I hope they find a home somewhere better.
- shiroiushi 2y agoIt sounds like most of the good talent has already left; the people still there are just there for the paycheck or resume padding and not for the long-term.
- singhrac 2y agoYou see this again and again - when you gate technical features behind an enterprise barrier, the adoption rate is very low. AMD messed this up with CDNA and RDNA (now merging to UDNA), but Nvidia had it right from the start: CUDA from the bottom to the top. Intel started doing this kind of right recently with their Xe cores (ideally same programming model between their integrated GPUs and their datacenter HPC GPUs), but we’ll see how different the Xe-LPG and Xe-HPC end up being when Falcon Shores really comes out (I’m very worried about this description of it as a XPU, which seems like real confusion about what ML people want).
- amluto 2y agoIt’s worse than just the licensing. They’re exposed as PCI devices, so they don’t automatically show up in VMs, they don’t access user memory in a particularly pleasant manner, they aren’t automatically usable in unprivileged programs, etc. And this destroys 99% (maybe 99.99%) of the actual economic value for Intel! What Intel needs is for people to integrate these accelerators into software the way that AVX is integrated into software. Then software and libraries can advertise things like “decompression is 7x faster on Intel CPUs that support such-and-such”, and then customers will ask for Intel CPUs. And customers will ask their providers to please make sure they support such-and-such feature, etc. But instead we have utterly inscrutable feature matrices, weird licensing conditions, and a near-complete lack of these features on development machines, and it’s no wonder that no one uses the features.
- jiggawatts 2y agoThen I guarantee you that there is an MBA in Intel somewhere crunching the numbers and calculating that "only 0.001% of our customers are utilising this feature", hence he's going to cut that team and stop offering the product in future Xeons. Which means that any fool that did utilise this feature has tied their cart to a horse that's going to be put down. Smarter people can see this coming a mile off and not bother investing any effort into support. It's so predictable that it's just depressing.