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> One of the key reasons why Rosetta 2 provides such a high level of translation efficiency is the support of x86-64 memory ordering in the Apple M1 SOC. https
by alganet 2y ago
> One of the key reasons why Rosetta 2 provides such a high level of translation efficiency is the support of x86-64 memory ordering in the Apple M1 SOC.
https://www.sciencedirect.com/science/article/pii/S1383762124000390 https://www.sciencedirect.com/science/article/pii/S138376212...
- ryao 2y agoTSO might be slower than ARM’s memory ordering, but implementing it in hardware is considered faster than implementing it in software.