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Maybe I'm just spitting out random BS, but if I understood Keller correctly when he spoke about Zen that (for it) it's not really a problem to change frontend I

Maybe I'm just spitting out random BS, but if I understood Keller correctly when he spoke about Zen that (for it) it's not really a problem to change frontend ISA as large chunk of work is on the backend anyways. If that's the case in general with modern processors, would be cool to see a hybrid that can be switched from x86_64 to RISC-V and, to add even more avangarde to it, associate a core or few of FPGA on the same die. Intel, get on it!

formerly_proven 2y ago
"not really a problem to change" in the context and scope of a multi-billion dollar project employing thousands of people full time.
vel0city 2y ago
There were consumer devices with a processor designed to be flexible on its instruction set presented to the user. https://en.wikipedia.org/wiki/Transmeta_Crusoe https://en.wikipedia.org/wiki/Transmeta_Crusoe https://youtu.be/xtuKqd-LWog?t=332 https://youtu.be/xtuKqd-LWog?t=332
- Keyframe 2y ago
  aka the company where Linus worked!
  - nineteen999 2y ago
    that also kinda failed to reach their goals unfortunately.
    - panick21_ 2y ago
      The failed because contract chip manufacturing was a huge issue back then. And the bet on slightly the wrong implementation as well. The fundamentally ideas weren't broken.
      - nineteen999 2y ago
        Yeah, I didn't ascribe any particular reason for it. I was dissapointed to hear the news, it came quietly after a long period of silence, which came after a much longer period of hype.
dwattttt 2y ago
If you think about it, that's what Thumb mode on ARM is.
- kevin_thibedeau 2y ago
  Plus the original Jazelle mode.
mschuster91 2y ago
> and, to add even more avangarde to it, associate a core or few of FPGA on the same die The use cases for FPGAs in consumer devices are ... close to zero unless you're talking about implementing copy protection since reverse engineering FPGA bitstreams is pretty much impossible if you're not the NSA, MI6 or Mossad with infinite brains to throw at the problem (and more likely than not, insider knowledge from the vendors).
mshockwave 2y ago
Reminds me that's also many people's speculation on how Qualcomm builds their RISCV chips -- swap an ARM decoder for a RISCV one.
- hajile 2y ago
  That's not speculation. Qualcomm made a 216-page proposal for their Znew[0] "extension". It was basically "completely change RISC-V to do what Arm is doing". The only reason for this was that it would allow a super-fast transition from ARM to RISC-V. It was rejected HARD by all the other members. Qualcomm is still making large investments into RISC-V. I saw an article estimating that the real reason for the Qualcomm v Arm lawsuit is that Qualcomm's old royalties were 2.5-3% while the new royalties would be 4-5.5%. We're talking about billions of dollars and that's plenty of incentive for Qualcomm to switch ISAs. Why should they pay billions for the privilege of designing their own CPUs? [0] https://lists.riscv.org/g/tech-profiles/attachment/332/0/code_size_extension_rvi_20231006.pdf https://lists.riscv.org/g/tech-profiles/attachment/332/0/cod...
neerajsi 2y ago
From what I gather the one time I got to speak with chip engineers is that real estate is still at a premium. Not necessarily the total size of the chip, but certain things need to be packed close together to meet the timing requirements. I think that means that you'd be paying a serious penalty to have two parallel sets of decoders for different ISAs.

formerly_proven 2y ago

"not really a problem to change" in the context and scope of a multi-billion dollar project employing thousands of people full time.

vel0city 2y ago

There were consumer devices with a processor designed to be flexible on its instruction set presented to the user. https://en.wikipedia.org/wiki/Transmeta_Crusoe https://en.wikipedia.org/wiki/Transmeta_Crusoe https://youtu.be/xtuKqd-LWog?t=332 https://youtu.be/xtuKqd-LWog?t=332

Keyframe 2y ago
aka the company where Linus worked!
- nineteen999 2y ago
  that also kinda failed to reach their goals unfortunately.
  - panick21_ 2y ago
    The failed because contract chip manufacturing was a huge issue back then. And the bet on slightly the wrong implementation as well. The fundamentally ideas weren't broken.
    - nineteen999 2y ago
      Yeah, I didn't ascribe any particular reason for it. I was dissapointed to hear the news, it came quietly after a long period of silence, which came after a much longer period of hype.

dwattttt 2y ago

If you think about it, that's what Thumb mode on ARM is.

kevin_thibedeau 2y ago
Plus the original Jazelle mode.

mschuster91 2y ago

> and, to add even more avangarde to it, associate a core or few of FPGA on the same die The use cases for FPGAs in consumer devices are ... close to zero unless you're talking about implementing copy protection since reverse engineering FPGA bitstreams is pretty much impossible if you're not the NSA, MI6 or Mossad with infinite brains to throw at the problem (and more likely than not, insider knowledge from the vendors).

mshockwave 2y ago

Reminds me that's also many people's speculation on how Qualcomm builds their RISCV chips -- swap an ARM decoder for a RISCV one.

hajile 2y ago
That's not speculation. Qualcomm made a 216-page proposal for their Znew[0] "extension". It was basically "completely change RISC-V to do what Arm is doing". The only reason for this was that it would allow a super-fast transition from ARM to RISC-V. It was rejected HARD by all the other members. Qualcomm is still making large investments into RISC-V. I saw an article estimating that the real reason for the Qualcomm v Arm lawsuit is that Qualcomm's old royalties were 2.5-3% while the new royalties would be 4-5.5%. We're talking about billions of dollars and that's plenty of incentive for Qualcomm to switch ISAs. Why should they pay billions for the privilege of designing their own CPUs? [0] https://lists.riscv.org/g/tech-profiles/attachment/332/0/code_size_extension_rvi_20231006.pdf https://lists.riscv.org/g/tech-profiles/attachment/332/0/cod...

neerajsi 2y ago

From what I gather the one time I got to speak with chip engineers is that real estate is still at a premium. Not necessarily the total size of the chip, but certain things need to be packed close together to meet the timing requirements. I think that means that you'd be paying a serious penalty to have two parallel sets of decoders for different ISAs.