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EDRAM was very different, and IBM still uses it today. It is DRAM that is on the same die as the cores, which makes it far slower than AMD's VCache (which is SR
by pclmulqdq 2y ago
EDRAM was very different, and IBM still uses it today. It is DRAM that is on the same die as the cores, which makes it far slower than AMD's VCache (which is SRAM). The concept is the same - putting a huge amount of cache on chip - but it's a very different solution.
The Intel solution was also not 3D stacked. It's a little like having an HBM stack next to the chip as a cache.
- jauntywundrkind 2y ago> It is DRAM that is on the same die as the cores, From the article, it was actually a separate die/chiplets, > Broadwell implemented its L4 cache on a separate 77mm2 die, creating a chiplet configuration. This cache die was codenamed “Crystal Well”, and was fabricated using the older 22nm process. A lot of interesting details in article about how widely different this dram is, made to go fast fast fast. Fun read. I'd really wanted a system with Crystal Well, seemed so cool. A lot of macs seemed to have the Intel Iris Pro models that had it. But general adoption in the PC market was - I feel - quite poor.
- pstrateman 2y agoI believe the high cache skus were Mac exclusive.
- anoother 2y agoI don't think so. I had a Crystal Well laptop from MSI. They also made them for desktop in I5, I7 and Xeon form.
- Sesse__ 2y agoThere was at least one socketed version.
- tedunangst 2y agoThey were also used in surface pros, not very effectively though since they were very thermally limited.
- deleted 2y ago[deleted]
- rbanffy 2y ago> and IBM still uses it today On mainframes, z14's drawer controller (that controlled four CPU sockets each) had a huge amount of eDRAM acting as an L4 cache for all cores in that drawer.
- myself248 2y agoIf it's in the drawer controller rather than in the CPU, is it really 'e'?
- rbanffy 2y agoThe drawer controller also connected the CPUs to the memory and managed the “RAIM” array. There was a lot of brains in that thing.
- Tuna-Fish 2y agoThe e in eDRAM doesn't really mean DRAM embedded in the cpu, it means DRAM embedded inside a logic process. Modern DRAM chips are manufactured in an entirely different way on a very different process than logic chips, and the manufacturing processes are incompatible. eDRAM was a very different implementation of DRAM that could be manufactured on a logic process. The difference between eDRAM and DRAM is not just that eDRAM is closer, it was also typically dramatically faster, but also had shorter retention period requiring more frequent refresh.
- p_l 2y agoLate HP-PA cpus had 1T-SRAM chips used for L2 cache to provide 32MB in PA-8800 and 64MB of L2 in PA-8900 (on top of still large 768kB L1i and L1d)
- RaftPeople 2y ago> * and IBM still uses it today* I remember reading about IBM's usage of eDRAM for cache when they first used it. Their analysis showed that for their server workloads the number one thing was to keep the cores busy and that a lot of slower eDRAM worked better than a smaller amount of faster DRAM.
- ThenAsNow 2y agoI was confused by the use of "EDRAM" vs. "eDRAM" here and by the HN capitalization of the original article. The EDRAM I'm familiar with, by a company called Ramtron and later Enhanced Memory Systems, seems to be largely lost to history. It's discussed in this relatively recent presentation, see slide 16 onward: https://site.ieee.org/pikespeak/files/2020/08/Silcon-Mountain-DRAM.pdf https://site.ieee.org/pikespeak/files/2020/08/Silcon-Mountai...