4 ms·
If you have electrical experience then the first level is simply wrong. Your instinct should be to parallel relays' outputs where possible (less delay, less rel
by theamk 2y ago
If you have electrical experience then the first level is simply wrong. Your instinct should be to parallel relays' outputs where possible (less delay, less relay wear, fewer glitches, more similar to TTL logic), but the software does not support this.
My advice is to treat it like a puzzle: "how do you implement NAND in relays _if_ you can not do any parallel connections". When formulated this way, it is pretty easy to solve.
(The relays disappear in level 2 and we switch to digital logic, so "cannot parallel outputs" limitation makes much more sense there. I am guessing they didn't want to make up a new mechanic just for a single level, but I wished they'd explain it better)
- sergex 2y agoAuthor here. Yeah, the first level is special and perhaps half-baked. It felt like cheating to start with the NAND-gate as the atomic component since transistors are not NAND-gates. So I start with electric relays (since they logically correspond to transistors but are easier to visualize). But I didn't want to get into realistic simulation of electronic circuits with all the complexity this entails. May I ask how you would have preferred to solve the first level if the game didn't have limitations?
- theamk 2y agoTwo relays' outputs in parallel (A.K.A. "top half of CMOS NAND cell"): https://commons.wikimedia.org/wiki/File:Relay_nand.svg https://commons.wikimedia.org/wiki/File:Relay_nand.svg (In real life, I might put a diode OR + single relay-based inverter, but that's too far into analog logic for the essentially digital game)