> there aren't new [x86] instructions (at least of consequence) on the horizon. Shirley you're joking? Did you miss APX, coming soon in Panther Cove? - expand

> there aren't new [x86] instructions (at least of consequence) on the horizon. Shirley you're joking? Did you miss APX, coming soon in Panther Cove? - expands x86_64 from 16 to 32 GPRs - adds 3-address instructions - updating flags is optional - push/pop 2 registers with one instruction - more conditional execution instructions, including loads & stores GCC 14 already supports 32 GPRs, 3-address, push2/pop2. GCC 15 (head) supports NF (No Flags).