4 ms·
The people who did RISC-V knew about AArch64 and designed it with hit performance in mind. Almost no conditional execution, a compressed mode that does cause is
by panick21_ 2y ago
The people who did RISC-V knew about AArch64 and designed it with hit performance in mind. Almost no conditional execution, a compressed mode that does cause issues and actually improves performance, no branch delay slot, no condition codes, no register windows and so on.
They have a whole book where they go threw each instruction and explain why they added it.
Its not perfectly optimized only for high performance, but that was certainty a major factor.
The architecture has been evaluated by people like Dave Ditzel and Jim Keller. The leader designer for Jim Kellers company worked on the M1. And they all seem to think that its a good design.