3 ms·
I agree with your point. Some ISAs are more, or less, amenable to implementations that are fast for modern workloads. E.g., a really bad ISA could make SIMD o
by CoastalCoder 2y ago
I agree with your point.
Some ISAs are more, or less, amenable to implementations that are fast for modern workloads.
E.g., a really bad ISA could make SIMD ops, floating point math, prompt interrupt handling, 64-bit addressing, etc. really hard to make into a fast implementation.
So based on the novelty of RISC-V, that's a plausible interpretation of the title.
- phkahler 2y agoOne of the things making x86 hard to implement is the flags register. Flags are set as a side effect of many instructions. I'd be really interested to see how Intel or AMD handle the flags in a modern processor. RISC-V gets rid of ISA defined flags entirely, so that problem goes away. In some cases the lack of flags can lead to slower software, but 99.9 percent won't miss them.