> Dennard scaling for SRAM has certainly halted, as demonstrated by TSMC’s 3nm process vs 5 nm. I don't think the latter (SRAM capacity remaining the same per

> Dennard scaling for SRAM has certainly halted, as demonstrated by TSMC’s 3nm process vs 5 nm. I don't think the latter (SRAM capacity remaining the same per area?) has anything to do with Dennard scaling.