2 ms·
Right, in the x86 example there are very few optional instructions and there aren't new instructions (at least of consequence) on the horizon. So you can compil
by geokon 2y ago
Right, in the x86 example there are very few optional instructions and there aren't new instructions (at least of consequence) on the horizon. So you can compile with switches if you really want I guess. I think ARM is a better example of things being a mess where people compile for older/core instructions and new instructions are underutilized. I can never remember the whole ARM thing with all the code sequences.. it's highly confusing
- brucehoult 2y ago> there aren't new [x86] instructions (at least of consequence) on the horizon. Shirley you're joking? Did you miss APX, coming soon in Panther Cove? - expands x86_64 from 16 to 32 GPRs - adds 3-address instructions - updating flags is optional - push/pop 2 registers with one instruction - more conditional execution instructions, including loads & stores GCC 14 already supports 32 GPRs, 3-address, push2/pop2. GCC 15 (head) supports NF (No Flags).