It's confirmed by the fact that it has 512MB of cache - reducing the number of functional chiplets would reduce the total amount of cache proportionately, so it

It's confirmed by the fact that it has 512MB of cache - reducing the number of functional chiplets would reduce the total amount of cache proportionately, so it has to be maxed out with the full set of chiplets. The other 16-core SKUs with just 64MB of cache are what you get when you reduce the number of chiplets and fill out the rest of the package with dummy silicon instead.