I agree with what you have said, except that AMD's experience with packaging techniques for multiple chips is way longer than "seven years". The first multi-ch

I agree with what you have said, except that AMD's experience with packaging techniques for multiple chips is way longer than "seven years". The first multi-chip AMD CPU has been Opteron Magny-Cours, in 2010. It had up to 12 cores in two 6-core chips. Zen 1 Epyc and Threadripper CPUs had a multi-chip partitioning more similar to Opteron Magny-Cours than to the following AMD CPUs, from Zen 2 to Zen 5. Intel's multi-chip Xeons also have a partitioning like that of Magny-Cours and Zen 1, except that their peripheral interfaces are extracted into separate chiplets made with a different lower-resolution CMOS process. The Magny-Cours/Zen 1/Xeon partitioning, where the memory controllers are distributed over the compute tiles, has the advantage of lower memory latency, but the disadvantage of non-uniform memory access (NUMA).