Chiplet is a term that is applied when using any of several fairly different packaging techniques. AMD's consumer Ryzen desktop and Epyc server processors use a

Chiplet is a term that is applied when using any of several fairly different packaging techniques. AMD's consumer Ryzen desktop and Epyc server processors use an organic substrate with chip-to-chip distances on the order of a centimeter, which is relatively bad for performance and power consumption of the interconnect, but it's cheap and has been working for them for seven years and counting. At the other end of the spectrum are techniques like die stacking using TSVs: more expensive but very high performance and low power. There are plenty of chiplet-based designs that meet whatever definition of "large scale" you may have had in mind. Intel's done datacenter processors consisting of four CPU chiplets (~400mm^2 each) in a square layout with silicon bridge interconnects between adjacent dies (as opposed to mounting everything on one large piece of silicon), and each of the four CPU chiplets is also connected to an 8-high TSV stack of HBM DRAM (Sapphire Rapids Xeon Max, currently used in the second-fastest supercomputer). That's way more silicon per socket than any monolithic die can provide, barring something like Cerebras's wafer-scale packaging. Intel's Meteor Lake laptop processor family launched at the end of last year has across its various configurations: CPU chiplets of two different sizes, GPU chiplets of two different sizes, a common SoC chiplet, and an optional extra IO chiplet for a total of six active chiplets designed for that generation, plus two sizes of passive base die those chiplets are mounted on, plus two or three sizes of dummy silicon filling in gaps at the edges of the arrangement of the active tiles. That's a lot of tapeouts across four different fab processes all for one generation of consumer processors, and it's been shipping in volume for basically the whole year.