4 ms·
Just when you get used with features like x86 CPUs combining two instructions into one micro-op (micro-op fusing), you get something like this. I guess immedia
by vardump 2y ago
Just when you get used with features like x86 CPUs combining two instructions into one micro-op (micro-op fusing), you get something like this.
I guess immediate addressing mode addition is a good choice to execute at rename / allocation stage, as it's common, relatively simple and can't generate exceptions.
- eigenform 2y ago> immediate addressing mode addition Well, except for the fact that you need to read from a register before adding the immediate displacement to it. You'd have to know the physical register and do the read very early (before renaming), or predict the value!
- eigenform 2y agoI just realized you were probably referring to the example given from the AnandTech article with `lea r64, [r64+imm8]`. Caveat is just that [presumably] the source and destination registers have to be matching (since `lea rax, [rax+imm]` is just `add rax, imm`).
- deleted 2y ago[deleted]
- Taniwha 2y agoThis isn't really combining as the result of the first increment is needed by the intermediate compare, but is a rewriting that removes a dependency (or moves it further back in the stream)