2 ms·
> If you have more than one core, can they introduce jitter or slowdown to each other accessing memory? DMA and fancy peripherals like UART, SPI etc, could be
by rightbyte 2y ago
> If you have more than one core, can they introduce jitter or slowdown to each other accessing memory?
DMA and fancy peripherals like UART, SPI etc, could be namedropped in this regard, too.
- nine_k 2y agoPlot twist: the very memory may be connected via SPI.