3 ms·
I could see this maybe reducing latency, but wouldn't you still be limited by the memory bus speed regardless of how high you could clock the DDR?
by packetlost 2y ago
I could see this maybe reducing latency, but wouldn't you still be limited by the memory bus speed regardless of how high you could clock the DDR?
- wmf 2y agoThe bus clock and memory clock are the same.