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These are part of a new generation of DDR5 modules that add a clock driver to the module itself, rather than relying entirely on the clock signal coming all the
by wtallis 2y ago
These are part of a new generation of DDR5 modules that add a clock driver to the module itself, rather than relying entirely on the clock signal coming all the way from the CPU's memory controller. That is expected to significantly change the game for DDR5 overclocking, and expectations based on the limitations of configurations lacking the clock drivers may not be accurate. I expect we'll see 6+ months of firmware tuning before we have a clear picture of what each platform is ultimately capable of, but early on the focus will be on Intel platforms.
- rowanG077 2y agoHow does that work? I imagine you now have the feed to clock from ram back to the CPU? Or does it synchronize two local clocks somehow?
- Gracana 2y agoThe clock redriver uses a phase locked loop to generate a few identical clock signals for use by the DRAM chips on the module. This same tech is also used for clock multipliers and dividers throughout digital systems. Rambus has details on their "DDR5 client clock driver" here: https://www.rambus.com/memory-interface-chips/ddr5-client-dimm-chipset/ddr5-ckd/ https://www.rambus.com/memory-interface-chips/ddr5-client-di...
- Numerlor 2y agoThis anandtech article seems to be a decent summary of what it's doing, the JEDEC JESD82-531A.01 spec is also freely available (with registration) if you're feeling adventurous https://www.anandtech.com/show/21455/making-desktop-ddr5-even-faster-cudimms-debut-at-computex https://www.anandtech.com/show/21455/making-desktop-ddr5-eve...
- packetlost 2y agoI could see this maybe reducing latency, but wouldn't you still be limited by the memory bus speed regardless of how high you could clock the DDR?
- wmf 2y agoThe bus clock and memory clock are the same.