7 ms·
Are delay slots unique to mips? They're a pretty significant aspect (complication) that I don't see anywhere else. Also, the gp register- don't know of any oth
by aleden 2y ago
Are delay slots unique to mips? They're a pretty significant aspect (complication) that I don't see anywhere else.
Also, the gp register- don't know of any other arch where you need to set something like that up to access global variables. It's another layer of indirection which makes the assembly code harder to read (especially PIC code that works off of the value of the t9 register)
- TapamN 2y ago>Are delay slots unique to mips? No, several other architectures of that period have delay slots (80s/90s), and modern VLIWs/DSPs still often have them. Sometimes the slots longer than a single instruction.
- drmpeg 2y agoSPARC has delay slots. Here's some code. The clr %o3 and restore %o0 are in the delay slots. 10082410 9de3bf98 save %sp, 0xffffff98, %sp 10082414 90102001 mov 1, %o0 10082418 92100018 mov %i0, %o1 1008241c 94100019 mov %i1, %o2 10082420 7fffff17 call dirList 10082424 96102000 clr %o3 10082428 81c7e008 ret 1008242c 91e80008 restore %o0