FDCs were tricky things. When reading you had to pick up a byte every 8 usec, when writing you had to be ready with the next byte in the same amount of time, an

FDCs were tricky things. When reading you had to pick up a byte every 8 usec, when writing you had to be ready with the next byte in the same amount of time, and a whole sector's worth would need to be dealt with without interruption. (Idk if the number was exactly 8 usec, but it was in that neighborhood) Most of the early 8 bit micros couldn't service an IRQ fast enough to keep up, so you'd be more likely to see a polling loop, but even those had to cut things tight. I saw some 1.7MHz 6809 code that could just about do it. Not sure how the old TRS80s dealt, maybe LDI type things? I know the IBM 5150 relied on a DMA chip to shift the sectors to/from disk. Would be fun to find out what the old S-100 systems did.