3 ms·
It's not on die, it's separate dies on chip. This engineering was common in x86 CPUs by 2013 when AMD introduced Heterogeneous System Architecture which utiliz
by zamadatix 2y ago
It's not on die, it's separate dies on chip.
This engineering was common in x86 CPUs by 2013 when AMD introduced Heterogeneous System Architecture which utilized Heterogeneous Uniform Memory Access. The approach has its upsides and downsides, the latter generally being a unified bus tends to have much lower overall bandwidth (even in the Max) and runtime scalability issues. Upsides are more obvious for the types of systems people want APUs for in the first place though so that's usually fine.
The main bit of engineering Apple should be lauded for in the memory department is the gumption to throw the hundreds of GB/s at the mid and high end models.
- paulmd 2y agoHSA was not “unified” in the modern sense. It still required designating memory as gpu or cpu side and these implied different cache coherency rules that meant memory couldn’t actually be shared, by default. To actually share memory you had to use a special “garlic bus” that guaranteed visibility and ordering and massively slowed down performance. Similarly, it was also impossible for the gpu to see cpu memory unless it was pinned and tagged for a special “onion bus”, but at least this was relatively fast iirc. https://www.realworldtech.com/fusion-llano/3/ https://www.realworldtech.com/fusion-llano/3/ In contrast apple actually has everything tied into a single unified space with a single controller that immediately makes all writes visible regardless of where the happen. They’ve also got enormously more memory bandwidth to play with. M1 Max is close to PS5 in both shader configuration and memory bandwidth.