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> critique on RISCV ISA by a ISA designer You mean an ex-Arm engineer. Of which Arm has thousands. And not an ISA designer or (more relevantly) CPU designer, b
by brucehoult 2y ago
> critique on RISCV ISA by a ISA designer
You mean an ex-Arm engineer. Of which Arm has thousands. And not an ISA designer or (more relevantly) CPU designer, but as the post itself says a verification engineer.
Actual top high performance CPU designers, such as Jim Keller, say that RISC-V is just fine.