4 ms·
An interesting part of Zen 5 architecture was related to lowering the absurd instruction passthrough time/power if I remember correctly! This definetly used to
by luyu_wu 2y ago
An interesting part of Zen 5 architecture was related to lowering the absurd instruction passthrough time/power if I remember correctly!
This definetly used to be the case on the older Intel implementations of large SIMD instructions (my Tiger lake chip being an anecdote)!