3 ms·
There was an area of redundant symmetric electronic design, that auto compensated for component level failures. I remember reading an "aerospace" manual all ab
by Joel_Mckay 2y ago
There was an area of redundant symmetric electronic design, that auto compensated for component level failures. I remember reading an "aerospace" manual all about it when I was a kid. It was necessitated when the tolerance and reliability of components were terrible by today standards.
Note too, that mil spec silicon is different in that it is resistant to CMOS latch-up, redundant CRC protected self-correcting consensus register ops, and large gate sizes less sensitive to Gamma radiation.
It was an interesting time, and a few people still think living under the Sword of Damocles builds character. =3
- detourdog 2y agoHere is a link to a bunch of artifacts from of those computers and their development. https://www.icloud.com/sharedalbum/#B0YG4TcsmGWIVSf https://www.icloud.com/sharedalbum/#B0YG4TcsmGWIVSf
- kens 2y agoNice collection of Autonetics photos! Are those your photos?
- detourdog 2y agoYes, I’m the guy the always promises to mail you the chips but always fails at the follow through. Seeing this article make me Think I really have to get you these chips.
- kens 2y agoI'm always ready with my microscope to take some die photos!
- Joel_Mckay 2y agoThere are several chip lines that used this method over the years for various reasons: https://en.wikipedia.org/wiki/Wafer_backgrinding https://en.wikipedia.org/wiki/Wafer_backgrinding Best regards =3