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But so much of the Apple II design was focused around minimizing chip usage and counted on exact timings that I don’t know that it would have been possible to c
by dhosek 2y ago
But so much of the Apple II design was focused around minimizing chip usage and counted on exact timings that I don’t know that it would have been possible to change the clock speed. Add in the fact that there was no access to a real time clock so things like timing delays counted on things like run this empty loop 100 times, or the fact that the graphics memory layout was tied to how the electron beam on the monitor refreshed pixels or the reliance on a quirk of timing of the 6502 processor in the disk II controller hardware and I don’t know that a 6502 at a different speed could possibly work.
- icedchai 2y agoThere were Apple II accelerators, like the Zip chip. Some clones, like the Laser 128/EX, also ran at higher speeds.
- Findecanor 2y agoThere was a 4 MHz 65C02 model .. but not until 1988: The Apple IIc+. You could lower the clock speed to 1 MHz for programs that relied on it, but the 65C02 did not support the unofficial/undocumented instructions of the original 6502 so there were still some programs that did not work.
- jkestner 2y agoThe IIc+ was such a refined form of the II. Motorized 3.5" floppy, integrated power supply for maximum portability (I'd take it to do basketball stats for the high school team), platinum color that carried through to Macs until the iMac.
- rbanffy 2y agoI need to fill out the missing pieces of my Apple II collection. Most of it is still in Brazil, and they are all clones. At least a //e platinum and a //c, preferably a plus, but I can’t be picky. A higher priority is a graphics-capable VT terminal to act as a reference for a promise I made to the VTE team. Unfortunately, they are incredibly rare this side of the Atlantic.
- KerrAvon 2y agoThe Enhanced IIe and the original IIc also had the 65C02 (at the original Apple II clock speed).
- TMWNN 2y ago>But so much of the Apple II design was focused around minimizing chip usage and counted on exact timings that I don’t know that it would have been possible to change the clock speed. A recent Adrian's Digital Basement video <https://www.youtube.com/watch?v=dt1eSXpo1SA https://www.youtube.com/watch?v=dt1eSXpo1SA> discusses this topic. While showing how a 80286 system runs at 1MHz, he discusses how the PC architecture allows (most) software to run at that clock speed while the Apple II architecture and software are inherently tied into the 1MHz clock speed. In retrospect it seems so sensible to have the IIe and IIc in 1983 and 1984 move to, say, 2MHz, that I'm sure that fears of breaking software compatibility contributed to that from happening. (That almost certainly would have been a short-term problem. Given how quickly the Apple II software moved en masse to 128K/80 columns by the mid-1980s, developers would have accounted for a faster clock speed too.)
- rbanffy 2y agoThe Apple /// ran at 2MHz but would slow down to 1 for expansion bus IO and Apple ][+ emulation.
- deleted 2y ago[deleted]
- TMWNN 2y agoThe III's II compatibility mode ramps that down to 1MHz, and has other restrictions to make sure that II software cannot use any III-only features. Without III sucking up all of Apple's R&D budget and attention c. 1979-1980, the Apple II would surely have seen earlier enhancements. The II+ (1979) would likely have had lowercase and better keyboard (which did not occur until IIe in 1983), and a new model in, say, 1981 might have shipped with an optional Apple 80-column card (again, with the IIe in actuality). Built-in 128K RAM probably would not have occurred until 1984, akin to the IIc's introduction, but earlier support for RAM expansion alongside 80 columns is possible. One of these models would likely have had the 2MHz clock, too, while no II in actuality shipped with a faster clock until IIgs in 1986.
- 2y ago
- rbanffy 2y agoThe big deal is video and RAM timing. If the memory is twice as fast, you’ll still be able to read from it for the video refresh at times the CPU won’t be able to. Also, I think DRAM refresh was done on the video timing. You’d need to rework all the logic on the board, but that was doable when they built the Mega 2 chip (and done in the IIgs FIP). The trickiest part would be the Disk ][ interface, and disk I/O done on it, as everything was timing-critical. A different disk controller that doesn’t rely on timings would be able to function. As for program timings, you don’t need an RTC. You want timers and interrupt generators. I believe the //e and the //c could generate interrupts on vertical blanking. For a game you could run all logic and drawing and set up the interrupt vector so that the next interrupt starts the next game cycle. To count time, a cycling timer that increments on vblank would be quite enough. IIRC, MSX had one of those.
- thought_alarm 2y ago> I believe the //e and the //c could generate interrupts on vertical blanking VBlank interrupts were only available through the Mouse Firmware, which was built into the IIc but a rarely-installed option on the IIe. As a result, there were no interrupt-driven games for the 8-bit Apple II machines. The complete lack of consistent frame rates and timing is a hallmark of Apple II gaming.
- vintermann 2y agoConversely, screen interrupts were at the core of Commodore 64 games, and of the demoscene. And also of arcade machines, NES and the whole next generation of consoles and non-IBM computers. So I wonder why it wasn't added. It wouldn't have been hard, exactly (enthusiasts for the TIKI-100, a Norwegian educational 8 bit, have gotten into the habit of repurposing the printer interrupt by means of a dongle in the printer port). Was the idea that educational machines shouldn't be too game-friendly?
- rbanffy 2y agoThey could at least be aware of real time. A default vblank interrupt handler that increments a 16-bit counter would be incredibly useful.