> ahhh, I think there's the source of our confusion: I suspect you are actually talking about NOR flash? Nope. PIC has on device NOR (which I've tested), and o

> ahhh, I think there's the source of our confusion: I suspect you are actually talking about NOR flash? Nope. PIC has on device NOR (which I've tested), and often has external NAND flash (depending on design choices), such as using SDCard interfaces. Here's [1] a Micron tech doc on their NAND chips stating quite clearly they allow exactly what I described doing above: "A NAND Flash block is 128KB. Erasing a block sets all bits to 1 (and all bytes to FFh). Programming is necessary to change erased bits from 1 to 0. The smallest entity that can be programmed is a byte." There's plenty of manufacturers and chip types that guarantee one can do this. It is tech notes like that led me to do some testing to see if devices fall into spec on R/W cycles before death when evaluating which chips to ship in consumer products that need this. [1] https://user.eng.umd.edu/~blj/CS-590.26/micron-tn2919.pdf https://user.eng.umd.edu/~blj/CS-590.26/micron-tn2919.pdf