3 ms·

No discussion of tristate logic? Tristate logic is how computer busses have been made for about the last half century. I'd hardly call USB unpopular ...

xpe 2y ago
Good point. Claim: Three-state logic can be advantageous in a digital system with a shared bus. The third state, Hi-Z, effectively disconnects a device from the bus. It allows multiple devices to share a single line efficiently. Does the above claim overlook anything fundamental about where tristate logic shines? There are alternative ways to design buses, but my EE-fu is not particularly current (pun intended). If others want to weigh in, please go ahead... e.g. open drain, multiplexing, TDMA, etc.
- dragontamer 2y ago
  I2C remains open collector today. The issue is that open collector is slow. It's hard to make a bus function above 1MHz and it won't go much beyond that. Sufficient for your typical temperature/ADC/whatever peripheral even today but 1Mhz is not very fast. 10kOhm pull-up will pull the bus back up to 3.3V or whatever your I2C operates at. Let's say each device on the bus adds 15pF of capacitance. At 6 devices, we are at 10kOhm * 6 * 15pF * 2.2 rise time == 2,000,000 ps rise time, aka 2us rise time aka 500kHz or somewhere in that neighborhood. (2.2 * RC constant gives the 80% rise time of a resistor-capacitor system. Capacitances in parallel add together. One 10kOhm pull-up resistor). ------- TriState buffers fix that by allowing a far greater drive of current into the bus. Current is the easiest way to fight back against fan-out * capacitance. Every chip will add parasitic capacitance and it actually adds up to real issues in practice.
akira2501 2y ago
The third state there is indeterminate and a read during that period is equally likely to produce a 0 or a 1. Logic /levels/ are what matters, not bus state. You can even see this in how it's implemented. You typically have an OUT line, and an OUT_ENABLE line. This is really just 2 bits.
- dragontamer 2y ago
  Electricity has no 'Logic Levels' to it. It's all voltages and currents. If DeviceA tries to set a line to 5V while DeviceB tries to set the same line to 0V, it doesn't matter what you think is going on in abstract computer land. There is likely some magic smoke getting let out somewhere. ------ EEs paper over these details by defining lines to be OpenCollector (ex: 8051 chips) where high voltage 5V is driven high by a 10kOhm pull-up resistor but otherwise no one trying to push currents (8051 has only uA of current push supported). But pull-down is strong. 8051 had IIRC 2mA of pulldown, sufficient to 'Beat' the 10kOhm resistor (which is pushing maybe 20uA). -------- TriState logic allows for greater currents to push onto the line. You can now push 2mA or 10mA of current to drive the line to 5V which leads to faster communication. Just with TriState, because of the greater currents involved, you must be aware of the fire hazard and try not to have a 5V drive at the same time as someone else's 0V. ------ EEs will pretend that these voltages and currents are 0 or 1 for the computer programmers. But there is actually a lot going on here. This is why TTL vs CMOS vs RTL vs Diode Logic vs whatever is a thing. EEs are calculation the currents and voltages necessary to build up the 0 vs 1 abstraction. But it only works within the specs of electricity / logic chosen. TTL has different specs than RTL has different specs than CMOS.
  - akira2501 2y ago
    > Electricity has no 'Logic Levels' to it. Yes, but transceivers do. > This is why TTL vs CMOS vs RTL vs Diode Logic vs whatever is a thing. Yes, and they all have /different/ logic levels. > the specs of electricity / logic chosen Yes, what one might call the "logic levels."
    - dragontamer 2y ago
      The most important difference between TTL and CMOS is the currents involved. I don't exactly remember the specification of TTL, but let's say it was around 1mA or at least in that magnitude. If you had a Billion transistors (such as I dunno... A 1-Gbit chip), then that's a billion * 1mA or about a Mega-Amp of current. It's physically impossible to run TTL current specs to build a computer today. That's why we switched to CMOS which has ~femtoamps of current instead. -------------- When every chip draws 1mA or so just to figure out on vs off, it's very difficult to build an efficient system. --------- 5V isn't sufficient to define on vs off in TTL logic. Only if that 5V signal also had enough current to turn on a BJT do you actually get an 'On' value. And once we start thinking currents AND Voltages, life gets a bit more complex.

xpe 2y ago

Good point. Claim: Three-state logic can be advantageous in a digital system with a shared bus. The third state, Hi-Z, effectively disconnects a device from the bus. It allows multiple devices to share a single line efficiently. Does the above claim overlook anything fundamental about where tristate logic shines? There are alternative ways to design buses, but my EE-fu is not particularly current (pun intended). If others want to weigh in, please go ahead... e.g. open drain, multiplexing, TDMA, etc.

dragontamer 2y ago
I2C remains open collector today. The issue is that open collector is slow. It's hard to make a bus function above 1MHz and it won't go much beyond that. Sufficient for your typical temperature/ADC/whatever peripheral even today but 1Mhz is not very fast. 10kOhm pull-up will pull the bus back up to 3.3V or whatever your I2C operates at. Let's say each device on the bus adds 15pF of capacitance. At 6 devices, we are at 10kOhm * 6 * 15pF * 2.2 rise time == 2,000,000 ps rise time, aka 2us rise time aka 500kHz or somewhere in that neighborhood. (2.2 * RC constant gives the 80% rise time of a resistor-capacitor system. Capacitances in parallel add together. One 10kOhm pull-up resistor). ------- TriState buffers fix that by allowing a far greater drive of current into the bus. Current is the easiest way to fight back against fan-out * capacitance. Every chip will add parasitic capacitance and it actually adds up to real issues in practice.

akira2501 2y ago

The third state there is indeterminate and a read during that period is equally likely to produce a 0 or a 1. Logic /levels/ are what matters, not bus state. You can even see this in how it's implemented. You typically have an OUT line, and an OUT_ENABLE line. This is really just 2 bits.

dragontamer 2y ago
Electricity has no 'Logic Levels' to it. It's all voltages and currents. If DeviceA tries to set a line to 5V while DeviceB tries to set the same line to 0V, it doesn't matter what you think is going on in abstract computer land. There is likely some magic smoke getting let out somewhere. ------ EEs paper over these details by defining lines to be OpenCollector (ex: 8051 chips) where high voltage 5V is driven high by a 10kOhm pull-up resistor but otherwise no one trying to push currents (8051 has only uA of current push supported). But pull-down is strong. 8051 had IIRC 2mA of pulldown, sufficient to 'Beat' the 10kOhm resistor (which is pushing maybe 20uA). -------- TriState logic allows for greater currents to push onto the line. You can now push 2mA or 10mA of current to drive the line to 5V which leads to faster communication. Just with TriState, because of the greater currents involved, you must be aware of the fire hazard and try not to have a 5V drive at the same time as someone else's 0V. ------ EEs will pretend that these voltages and currents are 0 or 1 for the computer programmers. But there is actually a lot going on here. This is why TTL vs CMOS vs RTL vs Diode Logic vs whatever is a thing. EEs are calculation the currents and voltages necessary to build up the 0 vs 1 abstraction. But it only works within the specs of electricity / logic chosen. TTL has different specs than RTL has different specs than CMOS.
- akira2501 2y ago
  > Electricity has no 'Logic Levels' to it. Yes, but transceivers do. > This is why TTL vs CMOS vs RTL vs Diode Logic vs whatever is a thing. Yes, and they all have /different/ logic levels. > the specs of electricity / logic chosen Yes, what one might call the "logic levels."
  - dragontamer 2y ago
    The most important difference between TTL and CMOS is the currents involved. I don't exactly remember the specification of TTL, but let's say it was around 1mA or at least in that magnitude. If you had a Billion transistors (such as I dunno... A 1-Gbit chip), then that's a billion * 1mA or about a Mega-Amp of current. It's physically impossible to run TTL current specs to build a computer today. That's why we switched to CMOS which has ~femtoamps of current instead. -------------- When every chip draws 1mA or so just to figure out on vs off, it's very difficult to build an efficient system. --------- 5V isn't sufficient to define on vs off in TTL logic. Only if that 5V signal also had enough current to turn on a BJT do you actually get an 'On' value. And once we start thinking currents AND Voltages, life gets a bit more complex.