A modern core has a bunch of resources (ALUs, register files and so on) to assign/draw upon as dynamically needed. Not every one is needed for every instructio

A modern core has a bunch of resources (ALUs, register files and so on) to assign/draw upon as dynamically needed. Not every one is needed for every instruction of course. In the old days when there was a single ALU, and maybe a single address calculator, that was that. Now the resources can be scheduled in a very complex, out of order, and subinstruction fashion. The chip designers guess what the instruction mix will likely be and hopefully make the right call as to how many Xs are required and how many Ys. Too few and operations in flight will wait. Too many and the chip becomes more complex for no benefit, and maybe those unused resources crowd out space for something else useful. If you stick an ALU on every register you’re guaranteeing to use some area on something not used all the time.