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My three reasons: 1) it is vital for earthlings to simplify chip design down to the materials level. XC2064 FPGA best starting point for moving logic away from
by vinnyvichy 2y ago
My three reasons:
1) it is vital for earthlings to simplify chip design down to the materials level. XC2064 FPGA best starting point for moving logic away from the CMOS paradigm, it is the simplest yet has all important details. If you are thinking about merging memory and logic, or even excitonic/polaritonic optical switching, XC2064 good to keep in mind?
2) I saw the your other post on the front page
3) Reverse engineering is sacred work, no harm reposting and recelebrating past work, 4 years is nothing on the glacial pace of realigning incentives :)
That said, I have a few questions:
The XC2064 uses a variety of highly-optimized circuits to implement its logic blocks and routing. This circuitry required a tight layout in order to fit onto the die.
Seems like you might have more info about the optimization details. Do you maybe have access to Ross' design notes or something?
- kens 2y agoNo, I don't have any access to internal design notes. But looking at the layout, it's clear that they went to a lot of work to optimize it.
- duskwuff 2y ago> XC2064 FPGA best starting point for moving logic away from the CMOS paradigm What makes you think that? The architecture of the XC2064 is fairly unremarkable; what makes it special is simply that it was Xilinx's first FPGA. More broadly, what do you mean by "moving logic away from the CMOS paradigm"? Whether you mean that in terms of logic families or something more fundamental, the starting point would probably be a few simple logic gates on a test wafer, not an entire FPGA.
- vinnyvichy 2y agoIt's remarkably simple (to me, at least) >moving logic Oops typo that "logic" isnt supposed to be there. I meant that its the simplest "complete" system that includes power, memory, i/o, tight integration with software (ie "bitstream format"), etc. If you already have tooling in place to fabricate logic gates systematically, it's almost trivial to go up to XC2064 level of complexity; you might even want to do that before optimizing your "revolutionary" logic gates. Okay this might again be obvious, but it's exciting, motivational, calming to point that out to "beginners" (often that's what revolutionaries are), who want to know at every step that something close to their API has been mostly validated & they can concentrate on the revolutionary kernel eg, the other front page threads on how to build very quickly and properly https://news.ycombinator.com/item?id=41148517 https://news.ycombinator.com/item?id=41148517 https://news.ycombinator.com/item?id=41150278 https://news.ycombinator.com/item?id=41150278