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This is awesome! Super exciting to see more software-level composability & reuse making its way into the world of chip design. Long overdue. I'm curious how yo
by ohong 2y ago
This is awesome! Super exciting to see more software-level composability & reuse making its way into the world of chip design. Long overdue.
I'm curious how you guys think about growing the corpus of open source data for training smarter chip design copilots, given the limited amount of publicly available Verilog code vs. what it took to train GH Copilot to work well for the most popular programming languages.
- sathvikr 2y agoHey thank you! I agree, IP reuse is important. We're definitely going to need a big initiative for that as there just aren't enough Verilog people as software people. And a lot of chip design is proprietary. Trying to do something like that at https://github.com/getinstachip/openchips https://github.com/getinstachip/openchips