2 ms·
I would also strongly suggest using a modern higher level HDL like clash or amaranth over raw-dogging it with VHDL or (System)Verilog.
by wyager 2y ago
I would also strongly suggest using a modern higher level HDL like clash or amaranth over raw-dogging it with VHDL or (System)Verilog.
- 15155 2y agoSpinalHDL or Chisel would be my recommendation - type-checked metaprogramming is really nice.