10 ms·
Visual simulation of the 6502 CPU
- gaoprea 14y agoand 6800: http://www.visual6502.org/JSSim/expert-6800.html http://www.visual6502.org/JSSim/expert-6800.html
- bane 14y agoVideo on the background http://www.youtube.com/watch?v=K5miMbqYB4E http://www.youtube.com/watch?v=K5miMbqYB4E
- _cbb1 14y agoWow this is really cool.
- adorton 14y agoI have no idea what is going on here, but it looks really neat.
- rbanffy 14y agoIIRC, it's a JS simulation based on the physical transistors of the original processor. Neat, indeed.
- kevinsd 14y agoMy eye hurts.
- secoif 14y agoAppears to not work in Chrome (at least for me). Safari did the trick though.
- rwallace 14y agoWorks in Chrome for me. (Windows 7, 64 bit, no extensions installed.)
- mck- 14y agoFancy. But what's it for?
- cmhamill 14y agoAny folks on here know of good resources that might help someone begin to understand what they're looking at here? More generally, learning about the physical operation of microprocessors? I'm particularly iffy when it gets to where the wires and the assembler meet, if you will.
- barik 14y agoThis is not a trivial question at all, since this sort of design is usually a third year undergraduate EE/ECE class, second year at the very earliest, usually in conjunction with semiconductor physics. It took an entire semester for me to be able to comfortable design (by hand) simple circuits in VLSI tools, such an adder. But usually folks will start with the simplest and fundamental of VLSI circuits, the NAND gate: http://en.wikipedia.org/wiki/CMOS http://en.wikipedia.org/wiki/CMOS In particular, see: http://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svg http://en.wikipedia.org/wiki/File:CMOS_NAND_Layout.svg and compare it with the schematic form of the circuit: http://en.wikipedia.org/wiki/File:CMOS_NAND.svg http://en.wikipedia.org/wiki/File:CMOS_NAND.svg which you can think of as a "zoomed" in version of a single gate for the entire chip. Looking at the full chip is often interesting and amusing, but not particularly illuminating. Instead, it's best to start with lower level primitives, just as you would in programming. Ignoring the ground circuity for now, think of A and B as the inputs, OUT as the OUTPUT, and trying to get a path from "VDD" to OUT to "energize" the output. In this case, you can see that when both A and B are activated ("blocking", if you will) there is no way for the VDD (blue) to make it "through" A or B to get to OUT (center line in yellow square). Again, see the NAND schematic, which also depicts this in non-layout form. On the other hand, when either A or B (or both) are "turned off", VDD has a clear path to OUT through the middle blue segment. The ground circuitry is similar, but it's based on De Morgan's laws. To be fair, most people don't build CPUs (entirely) by hand anymore. They are often VHDL/Verilog that is run through place/route algorithms. Think of a compiler, except a compiler that generates hardware instead of machine code. Just as optimization in a compiler might mean "reducing" instructions, optimization here might mean minimizing power usage or area of the chip. And just as compilers must deal with "finite registers", these compilers must contend with different layers of metal and making sure that the same metal does not incorrectly touch itself to create shorts.
- 14y ago
- js2 14y agoPrevious discussion: http://news.ycombinator.com/item?id=1702200 http://news.ycombinator.com/item?id=1702200
- __david__ 14y agoThat's an impressively detailed simulation. This is tangentially related, but I made an html5 Apple ][+ emulator which, of course, includes a 6502 component. Mine doesn't simulate gates or anything that cool (and isn't even 100% correct yet) but it boots and runs a lot of different software (at full speed): http://porkrind.org/a2/ http://porkrind.org/a2/
- deleted 14y ago[deleted]