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Exactly. With my typical setup, a makefile looks like this: BIN=my-program OBJ=file1.o file2.o file3.o DEPS=../foo/libfoo.so -include ../confi
by ori_b 14y ago
Exactly. With my typical setup, a makefile looks like this:
BIN=my-program
OBJ=file1.o file2.o file3.o
DEPS=../foo/libfoo.so
-include ../config.mk
include ../mk/c.mk
include ../mk/lexyacc.mk
It's not hard to modify, it's flexible, and if I need custom scripts to generate files, it's very easy to extend. I don't have to futz with compiler options, command line parameters, etc. I just add the next .o file to the list, and get back to coding.
There's room for improvement, but it works for me. And it's implemented in less than 100 lines of make.
- lmm 14y agoMost makefile projects end up with a simple list of files to add to. But each one does it in a slightly different way, because make is basically an unstructured shell-scripting language. I can barely stand to work on projects that don't use maven any more. Declare your dependencies and your sources in a standard format that every other project uses, and then get on with actually writing code; the build system is not the place for arbitrary complexity.
- ori_b 14y agoMake is a way of defining dependencies. It's relatively far from a free-form shell like language.