3 ms·
Groq's TSP architecture is one of the weirder and more wonderful ISAs I've seen lately. The choice of SRAM in fascinating. Are you guys planning on publishing a
by quotemstr 2y ago
Groq's TSP architecture is one of the weirder and more wonderful ISAs I've seen lately. The choice of SRAM in fascinating. Are you guys planning on publishing anything about how you bridged the gap between your order-hundreds-megabytes SRAM TSP main memory and multi-TB model sizes?
- foundval 2y agoThere is a lot out here. I gave a seminar about the overall approach recently, abstract: https://shorturl.at/E7TcA https://shorturl.at/E7TcA, recording: https://shorturl.at/zBcoL https://shorturl.at/zBcoL. This two-part AMA has a lot more detail if you're already familiar with what we do: https://www.youtube.com/watch?v=UztfweS-7MU https://www.youtube.com/watch?v=UztfweS-7MU https://www.youtube.com/watch?v=GOGuSJe2C6U https://www.youtube.com/watch?v=GOGuSJe2C6U
- quotemstr 2y agoThanks!