3 ms·

Generally speaking, hardware single-step is done by the OS telling the CPU "when you next execute an instruction in usermode, immediately afterwards take an exc

by pm215 2y ago

Generally speaking, hardware single-step is done by the OS telling the CPU "when you next execute an instruction in usermode, immediately afterwards take an exception and give me back control". (The details are more fiddly and the hardware might also let you do weirder things, but that's the right starting mental model to have of it, I think.) So when the debugger asks the OS "please single step this other process", the OS arranges to set the "do a single step" flag before returning to that other process; then when the exception happens and the OS gets back control after the single step it can tell the debugger "the single step has completed".

voidUpdate 2y ago
Ah, ok, so it's like it automatically inserts an int3 after the next step when you tell it to single step, and then the process is frozen again by that inserted int3 until the OS lets it go again? (Probably not actually inserting int3 but you get my example)
- pm215 2y ago
  Yeah, it doesn't actually insert a breakpoint, because then you need to look at the instruction to see what all the places it could end up next are (eg if it's a conditional branch you need a bp on both fall-through and take-branch). The "pure software" singlestep pjc50 mentions works like that, where it really is the debugger process looking at the instruction being single-stepped and manually inserting breakpoints the same way it would for any other kind of breakpoint it wanted (which is potentially pretty annoying to do for things like computed branches). But hardware-assisted singlestep doesn't need to do that, because the CPU can know when it's completed execution of the instruction and trigger the exception back to the OS right then. (NB: I'm most familiar with Arm CPU singlestep; I don't know exactly what Intel CPUs provide for this.)
  - voidUpdate 2y ago
    Alright, thanks so much =) I'm learning things today haha

by pm215 2y ago

voidUpdate 2y ago

Ah, ok, so it's like it automatically inserts an int3 after the next step when you tell it to single step, and then the process is frozen again by that inserted int3 until the OS lets it go again? (Probably not actually inserting int3 but you get my example)

pm215 2y ago
Yeah, it doesn't actually insert a breakpoint, because then you need to look at the instruction to see what all the places it could end up next are (eg if it's a conditional branch you need a bp on both fall-through and take-branch). The "pure software" singlestep pjc50 mentions works like that, where it really is the debugger process looking at the instruction being single-stepped and manually inserting breakpoints the same way it would for any other kind of breakpoint it wanted (which is potentially pretty annoying to do for things like computed branches). But hardware-assisted singlestep doesn't need to do that, because the CPU can know when it's completed execution of the instruction and trigger the exception back to the OS right then. (NB: I'm most familiar with Arm CPU singlestep; I don't know exactly what Intel CPUs provide for this.)
- voidUpdate 2y ago
  Alright, thanks so much =) I'm learning things today haha