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it sounds to me like complex instructions are unavoidable unless the use case is restricted to microcontrollers. A modern ISA should CPU feature flags that allo
by notepad0x90 2y ago
it sounds to me like complex instructions are unavoidable unless the use case is restricted to microcontrollers. A modern ISA should CPU feature flags that allow implementers to disable complex and expensive instruction sets.
Would it be fair to day that ARM for example is a CISC/RISC hybrid, where armv8-a is full on CISC but armv8-m is RISC proper? But that's what I'm suggesting anyways.
- FredFS456 2y agoDid you mean the other way around? -m is intended for simple(r) microcontrollers whereas -a is intended for application processors.
- notepad0x90 2y agosorry, yeah I meant the other way around.
- hajile 2y agoYou are conflating complex with niche. RISC embraces niche while avoiding complex. iAPX432 has examples of complex with stuff like OOP, garbage collection, and even data structures baked into the ISA. These instructions are very complex and take massive numbers of cycles to complete. In contrast, a bunch of bit manipulation instructions are niche, but any one of them can complete in just 1 or maybe 2 cycles. Same with something like AES where even x86 has a RISC-like approach where you call a couple simple instructions to setup, then you call a simple instruction (1-2 cycles) for each round then call some simple finalization instructions. Each instruction is niche, but not complex.
- notepad0x90 2y agomaybe i was conflating the two, but my point was cost of implementation. niche or not,minimizing hardware cost is important to consumers and vendors alike. On the other hand, for general purpose computing, complex instructions can provide a performance boost, as do "niche" instruction sets that may not necessarily complex as you put it. Since ARM doesn't actually make the hardware, it should let vendors select which feature sets they want to implement based on their requirements, ARM programs can then test the value of these static registers before attempting conditional execution.