4 ms·

Bad headline, he prefaces the statement with "I fear", `says` could've been written `fears` It's realistic to expect RISC-V's execution won't be (& hasn't been

by __s 2y ago

Bad headline, he prefaces the statement with "I fear", `says` could've been written `fears` It's realistic to expect RISC-V's execution won't be (& hasn't been) flawless The context is re spectre

brudgers 2y ago
Torvalds has experiences of sufficient breadth and depth such that it is not unreasonable to take his concerns about reconciling hardware and software as being the concerns of an expert. And of course these days Torvalds tends to be more tactful in his criticisms than when he was younger.
- ksec 2y ago
  Exactly this. A lot of people forgot or didn't know he used to work in CPU hardware ( Transmeta ) too. >And of course these days Torvalds tends to be more tactful in his criticisms than when he was younger. And that is why he has been very careful about RUST and RISC-V. And just on the parents notes, > It's realistic to expect RISC-V's execution won't be (& hasn't been) flawless Except most of the RISC-V supporter has been claiming every RISC-V execution are flawless.
  - brucehoult 2y ago
    > Except most of the RISC-V supporter has been claiming every RISC-V execution are flawless. No-nothings, perhaps. RISC-V cores are being designed by probably a couple of dozen companies, and chips made by many more (SiFive for example has 100+ customers for their cores). All of them have a list of more or less serious errata, just like every Arm and x86 chip. The strength is in the diversity, in the freedom to experiment and innovate, in the shared software ecosystem, in the security of knowing that if your chip vendor goes out of business for any reason (bankruptcy, change of plans, being acquired...) there will always be another vendor you can turn to. Unlike the people who were depending on Itanium, DEC Alpha, Motorola 68000, z80 and dozens of others.
    - bitwize 2y ago
      This. I keep hearing from Amiga people how the Amiga "coulda been a contenda" in this day and age of computing if only Commodore weren't so mismanaged. If only Commodore hadn't bought Amiga Inc. in the first place and the brilliant, revolutionary Jay Miner were allowed to market his designs on his own terms without being beholden to some evil corporate overlord who wanted to squeeze them for profit. If only. If only. But it was clear, from the late 1980s, that the PC was going to win because it was not under the control of a single corporation. Indeed, it was winning despite IBM beginning to fumble the ball. All corporations, in the long run, tend toward mismanagement that can totally sink a platform if it's under their control. It happened to Commodore, Atari, Symbolics, SGI, it almost happened to Apple in the 90s, and it looks like it might happen to Raspberry Pi in the near future. But when there's an open standard on which companies can compete even as they interoperate, the platform thrives, and things unimaginable to its originators can be built upon it. RISC-V brings this quality to the chip architecture and ISA, the same way Linux brought it to operating systems and the combination of x86, ISA/PCI bus, and BIOS/UEFI interface brought it to the general system design. It's not perfect, and no implementation of it is going to be perfect, but RISC-V really is gonna change everything.
      - brucehoult 2y ago
        I regret I have only one upvote to give.
    - throw0101c 2y ago
      > The strength is in the diversity, in the freedom to experiment and innovate, in the shared software ecosystem Does RISC-V have a standardized device discovery mechanism? One critique of ARM (?) I've heard is that for every maker of chips one has to basically re-invent the wheel on bus discover and then on-bus device discovery.
      - 15155 2y ago
        Device tree seems to be standard fare, just like ARM.
- Vinnl 2y ago
  I haven't read anything, but if he said "I fear that" rather than "I think that", that's the difference between cautioning against and predicting. The headline makes it seem like he was predicting.
- fooblaster 2y ago
  Linus continues to be wrong about CPU hardware now, just as he was back then. See for example in the past his continued insistence that ISA does not matter at all for performance. One need only look at the huge single threaded performance and efficiency of apple M cores (10 wide instruction fetch) relative any x86 to to see that that statement is not true. I don't think I would take his hardware assertions as gospel.
  - yjftsjthsd-h 2y ago
    > See for example in the past his continued insistence that ISA does not matter at all for performance. One need only look at the huge single threaded performance and efficiency of apple M cores (10 wide instruction fetch) relative any x86 to to see that that statement is not true. Your argument is that ISA impacts performance... and your example is ARM, which went from worse performance than x86 across the board to having an implementation that sometimes beats x86 because one company made a better implementation than everyone else? That seems like a great example showing that ISAs aren't the primary factor in performance.
    - fooblaster 2y ago
      Apples chips utterly dominate in performance per watt versus x86. Arm64s simple fixed length instruction set is absolutely central in this. Qualcomm now exceeding Intel in their mobile chips is further evidence ISA is critically important. In the data center this is also happening with graviton 4 and eventually grace hopper. Anyway, my point isn't that implementation does not effect performance. Of course it does. My point was that Linus has asserted ISA is irrelevant to performance, and that only implementation matters. That assertion does not hold up.
      - snvzz 2y ago
        >Arm64s simple fixed length instruction set is absolutely central in this. Note that doing variable instruction length is not an issue per-se as proven by more dense, yet still easy to decode RISC-V. The way x86 does it, however, is very costly to decode and overall awful.
monocasa 2y ago
I'm not sure he's talking about the cores themselves. What's more likely IMO is the ecosystem choices like preboot environment.
colinstone 2y ago
None of Torvalds direct quotes use the word fear at all Torvalds is quoted as saying “I suspect…” The article author qualified such with the use of “fear” We need a quiz before comments are posted; did you read the article? And ask for written context about a random segment.
- __s 2y ago
  I watched the whole discussion https://m.youtube.com/watch?v=cPvRIWXNgaM&t=450 https://m.youtube.com/watch?v=cPvRIWXNgaM&t=450 > My fear is that... Get off my lawn

by __s 2y ago

Bad headline, he prefaces the statement with "I fear", `says` could've been written `fears` It's realistic to expect RISC-V's execution won't be (& hasn't been) flawless The context is re spectre

brudgers 2y ago

Torvalds has experiences of sufficient breadth and depth such that it is not unreasonable to take his concerns about reconciling hardware and software as being the concerns of an expert. And of course these days Torvalds tends to be more tactful in his criticisms than when he was younger.

ksec 2y ago
Exactly this. A lot of people forgot or didn't know he used to work in CPU hardware ( Transmeta ) too. >And of course these days Torvalds tends to be more tactful in his criticisms than when he was younger. And that is why he has been very careful about RUST and RISC-V. And just on the parents notes, > It's realistic to expect RISC-V's execution won't be (& hasn't been) flawless Except most of the RISC-V supporter has been claiming every RISC-V execution are flawless.
- brucehoult 2y ago
  > Except most of the RISC-V supporter has been claiming every RISC-V execution are flawless. No-nothings, perhaps. RISC-V cores are being designed by probably a couple of dozen companies, and chips made by many more (SiFive for example has 100+ customers for their cores). All of them have a list of more or less serious errata, just like every Arm and x86 chip. The strength is in the diversity, in the freedom to experiment and innovate, in the shared software ecosystem, in the security of knowing that if your chip vendor goes out of business for any reason (bankruptcy, change of plans, being acquired...) there will always be another vendor you can turn to. Unlike the people who were depending on Itanium, DEC Alpha, Motorola 68000, z80 and dozens of others.
  - bitwize 2y ago
    This. I keep hearing from Amiga people how the Amiga "coulda been a contenda" in this day and age of computing if only Commodore weren't so mismanaged. If only Commodore hadn't bought Amiga Inc. in the first place and the brilliant, revolutionary Jay Miner were allowed to market his designs on his own terms without being beholden to some evil corporate overlord who wanted to squeeze them for profit. If only. If only. But it was clear, from the late 1980s, that the PC was going to win because it was not under the control of a single corporation. Indeed, it was winning despite IBM beginning to fumble the ball. All corporations, in the long run, tend toward mismanagement that can totally sink a platform if it's under their control. It happened to Commodore, Atari, Symbolics, SGI, it almost happened to Apple in the 90s, and it looks like it might happen to Raspberry Pi in the near future. But when there's an open standard on which companies can compete even as they interoperate, the platform thrives, and things unimaginable to its originators can be built upon it. RISC-V brings this quality to the chip architecture and ISA, the same way Linux brought it to operating systems and the combination of x86, ISA/PCI bus, and BIOS/UEFI interface brought it to the general system design. It's not perfect, and no implementation of it is going to be perfect, but RISC-V really is gonna change everything.
    - brucehoult 2y ago
      I regret I have only one upvote to give.
  - throw0101c 2y ago
    > The strength is in the diversity, in the freedom to experiment and innovate, in the shared software ecosystem Does RISC-V have a standardized device discovery mechanism? One critique of ARM (?) I've heard is that for every maker of chips one has to basically re-invent the wheel on bus discover and then on-bus device discovery.
    - 15155 2y ago
      Device tree seems to be standard fare, just like ARM.
Vinnl 2y ago
I haven't read anything, but if he said "I fear that" rather than "I think that", that's the difference between cautioning against and predicting. The headline makes it seem like he was predicting.
fooblaster 2y ago
Linus continues to be wrong about CPU hardware now, just as he was back then. See for example in the past his continued insistence that ISA does not matter at all for performance. One need only look at the huge single threaded performance and efficiency of apple M cores (10 wide instruction fetch) relative any x86 to to see that that statement is not true. I don't think I would take his hardware assertions as gospel.
- yjftsjthsd-h 2y ago
  > See for example in the past his continued insistence that ISA does not matter at all for performance. One need only look at the huge single threaded performance and efficiency of apple M cores (10 wide instruction fetch) relative any x86 to to see that that statement is not true. Your argument is that ISA impacts performance... and your example is ARM, which went from worse performance than x86 across the board to having an implementation that sometimes beats x86 because one company made a better implementation than everyone else? That seems like a great example showing that ISAs aren't the primary factor in performance.
  - fooblaster 2y ago
    Apples chips utterly dominate in performance per watt versus x86. Arm64s simple fixed length instruction set is absolutely central in this. Qualcomm now exceeding Intel in their mobile chips is further evidence ISA is critically important. In the data center this is also happening with graviton 4 and eventually grace hopper. Anyway, my point isn't that implementation does not effect performance. Of course it does. My point was that Linus has asserted ISA is irrelevant to performance, and that only implementation matters. That assertion does not hold up.
    - snvzz 2y ago
      >Arm64s simple fixed length instruction set is absolutely central in this. Note that doing variable instruction length is not an issue per-se as proven by more dense, yet still easy to decode RISC-V. The way x86 does it, however, is very costly to decode and overall awful.

monocasa 2y ago

I'm not sure he's talking about the cores themselves. What's more likely IMO is the ecosystem choices like preboot environment.

colinstone 2y ago

None of Torvalds direct quotes use the word fear at all Torvalds is quoted as saying “I suspect…” The article author qualified such with the use of “fear” We need a quiz before comments are posted; did you read the article? And ask for written context about a random segment.

__s 2y ago
I watched the whole discussion https://m.youtube.com/watch?v=cPvRIWXNgaM&t=450 https://m.youtube.com/watch?v=cPvRIWXNgaM&t=450 > My fear is that... Get off my lawn