This is more apocryphal than lore, but the understanding I've picked up from EE friends is that standard cells are used because they're proven to work in a give

This is more apocryphal than lore, but the understanding I've picked up from EE friends is that standard cells are used because they're proven to work in a given fab process. You don't want your layout software coming up with a trillion different gate prototypes in the midst of laying out your logic circuit!