3 ms·
I'm very skeptical of this too. I don't see a mechanism where moving transistors could break the machine. Although I wonder if you could blow up the die testing
by kens 2y ago
I'm very skeptical of this too. I don't see a mechanism where moving transistors could break the machine. Although I wonder if you could blow up the die testing machine by making a chip that was one big charge pump :-)
- rsdfvn1099 2y agoIt's not obvious what "moving" means in this thread but no foundry would ever let you make a design the grossly violates the design rule checks (DRC). It's hard to imagine how something risking damage of anything would get through all the many, many, checks, but wasting time and money is definitely possible and to be avoided. As an aside, few analog layouts will use the "line of diffusion" style that's common in the standard cells. And in analog one can find more exotic transistor patterns, like waffle [1], that aren't used in digital. Many things are possible, but it has to pass DRC. [1] https://www.radioeng.cz/fulltexts/2019/19_03_0598_0609.pdf https://www.radioeng.cz/fulltexts/2019/19_03_0598_0609.pdf
- eternauta3k 2y agoSkeptical here as well, no one is proposing a serious mechanism for damage like "you left gate oxide uncovered by silicide so it contaminates the CMP machine" or whatever. What I can imagine, is that the foundry only tests their magic OPC algorithm with DRC clean inputs. If your mask isn't DRC clean, who knows what's coming out the other side.