According to the manufacturer-supplied diagram shown (and the video of the board in-situ), the gate control board knows that the gate is open or closed based on

According to the manufacturer-supplied diagram shown (and the video of the board in-situ), the gate control board knows that the gate is open or closed based on the status of two limit switch inputs, labeled SWO and SWC. Such an interface cannot get any more exposed than that. There's no reason to throw a stew of TLAs at the problem. (I have a strong suspicion that nobody responding here actually -- you know -- looked at this problem as it actually exists before deciding that it somehow cannot be resolved.)