3 ms·

If the goal ends up being many-many-core, x86's complexity tax may start to matter. The cost of x86 compatibility relative to all the complexities required for

by mlyle 2y ago

If the goal ends up being many-many-core, x86's complexity tax may start to matter. The cost of x86 compatibility relative to all the complexities required for performance has been small, but if we end up deciding that memory latency is going to kill us and we can't keep complex cores fed, then that is a vote for simpler architectures. I suspect the future will be something between these extremes (tons of dumb cores or ever-more-complicated cores to try and squeeze out IPC), though.

hajile 2y ago
The x86 tax ALREADY matters. Intel was only able to increase the number of decoders by adding entirely independent decoder complexes while reducing the number of decoders per branch. In practice, this means that decode increases for branchy code, but non-branchy code will be limited to just 3 decoders. In contrast, an ARM X4 or Apple M4 can decode 10 instructions under all conditions. This also play into ideas like Larabee/Knights processors where you basically want the tiniest core possible attached to a massive SIMD engine. x86 decode eats up a lot of real estate. Even worse, x86 decode adds a bunch of extra stages which in turn increase the size of the branch predictor. That's not the biggest issue though. Dealing with all of this and all the x86 footguns threaded throughout the pipeline slows down development. It takes more designers and more QAs more time to make and test everything. ARM can develop a similar CPU design for a fraction of the cost compared to AMD/Intel and in less time too because there's simply fewer edge cases they have to work with. This ultimately means the ARM chips can be sold for significantly less money or higher margins.
- TinkersW 2y ago
  In the talk given by lead architect for skymont they implied it could decode 9 under all conditions, not just when there are heavy branches.
- jart 2y ago
  Then show me the low-cost ARM version of AMD's 96-core Threadripper.
  - wmf 2y ago
    Ampere One was supposed to be out by now.
- nuudlman 2y ago
  The fun thing with branch predictors is that they tell you where the next branch is (among other things like the direction of the branch). Since hardware is built out of finite wires, the prediction will saturate to some maximum distance (something in the next few cache lines). How this affects decode clusters is left as an exercise to the reader.
- atq2119 2y ago
  > In contrast, an ARM X4 or Apple M4 can decode 10 instructions under all conditions. Not if there are fewer than 10 instructions between branches...

by mlyle 2y ago

hajile 2y ago

The x86 tax ALREADY matters. Intel was only able to increase the number of decoders by adding entirely independent decoder complexes while reducing the number of decoders per branch. In practice, this means that decode increases for branchy code, but non-branchy code will be limited to just 3 decoders. In contrast, an ARM X4 or Apple M4 can decode 10 instructions under all conditions. This also play into ideas like Larabee/Knights processors where you basically want the tiniest core possible attached to a massive SIMD engine. x86 decode eats up a lot of real estate. Even worse, x86 decode adds a bunch of extra stages which in turn increase the size of the branch predictor. That's not the biggest issue though. Dealing with all of this and all the x86 footguns threaded throughout the pipeline slows down development. It takes more designers and more QAs more time to make and test everything. ARM can develop a similar CPU design for a fraction of the cost compared to AMD/Intel and in less time too because there's simply fewer edge cases they have to work with. This ultimately means the ARM chips can be sold for significantly less money or higher margins.

TinkersW 2y ago
In the talk given by lead architect for skymont they implied it could decode 9 under all conditions, not just when there are heavy branches.
jart 2y ago
Then show me the low-cost ARM version of AMD's 96-core Threadripper.
- wmf 2y ago
  Ampere One was supposed to be out by now.
nuudlman 2y ago
The fun thing with branch predictors is that they tell you where the next branch is (among other things like the direction of the branch). Since hardware is built out of finite wires, the prediction will saturate to some maximum distance (something in the next few cache lines). How this affects decode clusters is left as an exercise to the reader.
atq2119 2y ago
> In contrast, an ARM X4 or Apple M4 can decode 10 instructions under all conditions. Not if there are fewer than 10 instructions between branches...