As mentioned by another comment, the flash chosen a 16 Mbit according to Avnet's listing. Storage during component selection is pretty much always in bits, wher

As mentioned by another comment, the flash chosen a 16 Mbit according to Avnet's listing. Storage during component selection is pretty much always in bits, whereas consumers like bytes. That being said, the board should be reworkable to swap the flash. Other notes: 1. Differential routing was mentioned, but no mention of impedance. It's a short run so it's probably fine (I've run high speed over jumper wires before) but it should be noted. 2. There's merit to it being a very simple board, but an SD card connector may have saved the usability and likely really expanded what you can do with the system. 3. The workaround to load directly into DDR was good thinking. 4. Again understood for simplicity but LDO-ing almost 4V down for a core rail is unideal. I couldn't easily find specs on how much current will be taken on this (or any) rail, but just remember that every milliamp here is 4 milliwatts burned as heat. 5. Good to use a simple SoC like this. Integrating DDR and QFN show a real reverence for the challenges one can run into with modern LP5 and BGA parts. Really don't want that so early in the education. Overall good article, and good work