Those are two different problems. And this is just research for now. But to address leakage there are already the gate-all-around transistors [1], which are in

Those are two different problems. And this is just research for now. But to address leakage there are already the gate-all-around transistors [1], which are in semiconductor companies roadmaps [2]. [1] https://www.asml.com/en/news/stories/2022/what-is-a-gate-all-around-transistor https://www.asml.com/en/news/stories/2022/what-is-a-gate-all... [2] https://www.anandtech.com/show/16823/intel-accelerated-offensive-process-roadmap-updates-to-10nm-7nm-4nm-3nm-20a-18a-packaging-foundry-emib-foveros/3 https://www.anandtech.com/show/16823/intel-accelerated-offen...