Sorry, but Z80 being "regular and understandable"? ADD A,B ;8 bit add, B to A ADD HL,BC ;16 bit add, BC to HL ADD B,A ;invalid! destin

Sorry, but Z80 being "regular and understandable"? ADD A,B ;8 bit add, B to A ADD HL,BC ;16 bit add, BC to HL ADD B,A ;invalid! destination can only be A or HL ADC A,B ;add with carry SBC A,B ;subtract with carry SUB B ;subtract (A is implicit, same for AND,OR,XOR) LD A,(HL) ;load A from memory at HL LD B,(HL) ;load B from HL LD A,(DE) ;load A from DE LD B,(DE) ;invalid! must be reg=A or mem=(HL) LD A,(var) ;load A from variable LD HL,(var) ;load HL from variable LD DE,(var) ;extra opcode byte, 4 cycles slower LD B,(var) ;invalid! must be A or register pair JP (HL) ;load PC with contents of HL register, NOT MEMORY! EX DE,HL ;exchange DE with HL (no other registers allowed) EX HL,(SP) ;exchange HL with top of stack (no other reg,mem allowed) EX AF,AF' ;wtf were they thinking? EXX ;should be EX BCDEHL,BCDEHL' for consistency :)